Graduate level academic Projects:

1.      Development of a multi-standard radio transceiver (for GSM and 802.11b) in Matlab – as part of Digital Radio Processing course.

2.      Full custom IC design of a “High Speed Frequency Divider” in AMI 0.5u technology operating at 800MHz was designed – as part of VLSI Design Course

3.      Design of Single stage Folded cascode Operational amplifier – as part of Analog Integrated Circuit Design course.

4.      Design and Implementation of a MP3 Decoder in Labview and interfacing the same with DSP-C6x processor using CCS– as part of Applied DSP course.

5.      CAD tool Development – Bi-partitioning using Simulated annealing algorithm – as part of CAD algorithms course.

6.      Design and Implementation of IPV4 packet forwarding engine in Altera NIOS CPU development kit – as part of Microprocessor Systems course.

7.      Implementation of Tomasulo pipeline in C language – as part of Computer Architecture course.

Undergraduate level projects:

1.      Design and Implementation of reconfigurable encryption engine with Twofish and DES algorithms in Xilinx FPGA – Senior Design Project, REC Trichy.

2.      Data Handling and Analysis for Global Positioning System (GPS) using ‘C’ language - in Indian Space Research Organization, Bangalore, INDIA.

3.      Design and Implementation of Control and Status logic for C6x-Evaluation Module in Xilinx XC9500 CPLD – VLSI Design Center, REC Trichy.

4.      Serial NvRam Programming for the C6x-Evaluation Module – VLSI Design Center, REC Trichy.