1. G.B. Zhang, S. Saw, J. Liu, S. Sterrantino, D.K. Johnson, and S. Jung, “An accurate current source with on-chip self-calibration circuits for low-voltage current mode differential drivers,” IEEE Transactions on Circuits and Systems I, accepted for publication in Jul. 2005.
2. R.M. Li, D. Zhou, J. Liu and X. Zeng, “Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires,” IEEE Transaction on Computer Aided Design, accepted for publication in Jan. 2005.
3. X.F. Lin, S. Saw, and J. Liu, “A CMOS 0.25-µm continuous-time FIR filter with 125ps per tap delay as fractionally spaced receiver equalizer for 1Gbps data transmission,” IEEE Journal of Solid-state Circuits, vol. 40, pp. 593-602, Mar. 2005.
4. G.B. Zhang and J. Liu, “High time-resolution motion detection with time stamped pixel design,” Analog Integrated Circuits and Signal Processing, accepted for publication in Aug. 2004.
5. J. Zhou and J. Liu, “On the measurement of common mode rejection ratio,” IEEE Transactions on Circuits and Systems II, vol. 52, pp. 49-53, Jan. 2005.
6. X.F. Lin and J. Liu, “A digital power spectrum estimation method for the adaptation of high-speed equalizer,” IEEE Transactions on Circuits and Systems I, vol. 51, pp. 2436-2443, Dec. 2004
7. J. Liu and X.F. Lin, “Equalization in high-speed communication systems,” IEEE Circuits and Systems Magazine, pp. 4-17, Second Quarter, 2004 (invited feature article).
8. S. Jung, M. A. Brooke, N. M. Jokerst, J. Liu, and Y. Joo, “Parasitic modeling and analysis for a 1 Gb/s CMOS laser driver,” IEEE Transactions on Circuits and Systems II, vol. 51, pp. 517-522, Oct. 2004.
9. J. Liu, M. Brooke, and K. Hirotsu, “A CMOS feed-forward neural network chip with on-chip parallel learning for oscillation cancellation,” IEEE Transaction on Neural Networks, vol. 13, pp. 1178-1186, 2002.
10. G. B. Zhang, G. Bayramoglu, J. Liu, and H. Ogmen, “Analogue integrated circuit design for sustained neurons in a fly,” IEE Electronics Letters, vol. 37, No. 14, pp. 867-868, 2001.
11. J. Zhou, J. Liu, and D. Zhou, “A reduced setup time static D flip-flop,” IEE Electronics Letters, vol. 37, No.5, pp. 279-280, 2001.
Published and accepted conference papers:
1. G. B. Zhang, H. Lee, and J. Liu, “A 35nW/pixel 2D visual motion sensor,” European Solid-State Circuits Conference, Grenoble, France, Sept. 2005, accepted for publication.
2. X. F. Lin, H. Lee, and J. Liu, “A continuous-rime adaptive FIR equalizer with INV-AIL delay line for 2.5Gb/s data communication,” IEEE Custom Integrated Circuits Conference, San Jose, California, USA, Sept. 2005, accepted for publication.
3. Y.L. Li and J. Liu, “A 13.56MHz RFID transponder front-end with merged load modulation and voltage doubler-clamping rectifier circuits,” in Proceedings of IEEE International Symposium on Circuits and Systems, May 2005.
4. X. Chen and J. Liu, “A delay compensation technique for N-phase clock generation with 2(N-1) delay units,” in Proceedings of IEEE International Symposium on Circuits and Systems, May 2005.
5. G.B. Zhang and J. Liu, “Novel time-stamped pixel structure for high-speed 2D CMOS visual motion sensor,” in Proceedings of IS&T/SPIE Symposium on Electronic Imaging, vol. 5677, Jan. 2005, pp. 55-66.
6. H. Liu, X.F. Lin, Y. Kim, J. Liu, and S. Jung, “Electronic dispersion compensation for 10Gbps data transmission over multi-mode fibers,” in Proceedings of IEEE Dallas workshop on High performance circuit design, Sept. 2004, pp. 159-162.
7. S. Jung, J. Gao, and J. Liu, “CMOS multi-level signal transmitter for optical communication,” in Proceedings of IEEE Mid-west Symposium on Circuits and Systems, vol. 2, Jul. 2004, pp. 185-188.
8. S. Gregori, Y.L. Li, H.J. Li, J. Liu and F. Maloberti, “A 2.45GHz power and data transmission for a low-power autonomous sensors platform,” in Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design, Aug. 2004, pp. 269-273.
9. Y. Jeong, S. Jung, and J. Liu, “A CMOS impulse generator for UWB wireless communication system,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 4, May 2004, pp. 129-132.
10. H. Zhang, J. Zhang, D. Zhou, J. Liu, L. Jiang, and Y. Pan, “A closed-form phase noise solution for an ideal LC oscillator,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 4, May 2004, pp. 768-771.
11. X. Zhou, D. Zhou, J. Liu, R. Li, X. Zeng and C. Chiang, “Steady-state analysis of nonlinear circuits using discrete singular convolution method,” in Proceedings of Design, Automation and Test in Europe Conference and Exhibition, Feb. 2004, pp. 1322-1326.
12. R. Li, D. Zhou, and J. Liu, “Power-optimal simultaneous buffer insertion/sizing and wire sizing,” in Proceedings of IEEE International Conference on Computer Aided Design, Nov. 2003, pp. 581-586.
13. G.B. Zhang, T.H. Yang, S. Gregori, J. Liu, and F. Maloberti, “Ultra-low power motion-triggered image sensor for distributed wireless sensor network,” in Proceedings of IEEE Sensors Conference, Oct. 2003, pp. 1141 – 1146.
14. G. Earle, J. Liu, G.B. Zhang, H. Liu, “Ongoing miniaturization efforts for ion and neutral vector velocity instruments”, in Proceedings of the 17th Annual AIAA / Utah State University Conference on Small Satellites, Aug. 2003.
15. G.B. Zhang, J. Liu, and S. Jung, “An accurate current source with on-chip self-calibration circuits for low-voltage differential transmitter drivers,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2, May 2003, pp. 192-195.
16. X.F. Lin and J. Liu, “A CMOS analog continuous-time FIR filter for 1Gps cable equalizer,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2, May 2003, pp. 296-299.
17. X.F. Lin, G.B. Zhang and J. Liu, “Pulse extraction: a digital power spectrum estimation method for adaptation of GBPS equalizers,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 1, May 2003, pp. 749-752.
18. S. Gondi, R. Geiger, J. Liu, J. Bareither, S. Sterrantino, E. Pace, “A 2V low-power CMOS 125MBaud repeater architecture for UTP5 cables,” in Proceedings of 28th European Solid-state Circuits Conference, Sept. 2002, pp. 571-574.
19. J. Huang, J. Liu, M. Burns, and W. L. Chen, “An on-chip GHz under-sampling delta modulator,” in Proceedings of IEEE Midwest Symposium on Circuits and Systems, vol. 2, Aug. 2002, pp. 79-82
20. X.F. Lin, J. Liu, and J. Fonseka, “A high-speed low-noise equalization technique with improved bit error rate,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 2, May 2002, pp. 564-567.
21. G.B. Zhang and Jin Liu, “A robust edge detector for motion detection,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 4, May 2002, pp. 45-48.
22. X.F. Lin, J. Huang, J. Zhou, and J. Liu, “A low-noise equalizer architecture for hgh-speed data transmission,” in Proceedings of IEEE Mid-west Symposium on Circuits and Systems, vol. 1, Aug. 2001, pp. 385-388.
23.G.B. Zhang, S. Sterrantino, J. Zhou, and J. Liu, “An accurate CMOS current source for low-voltage transmitter drivers,” in Proceedings of IEEE Mid-west Symposium on Circuits and Systems, Fairborn, vol. 1, Aug. 2001, pp. 219-222.
24. J. Zhou and J. Liu, “A low-power and low-cost frequency doubling circuit,” in Proceedings of IEEE Mid-west Symposium on Circuits and Systems, vol. 1, Aug. 2001, pp. 348-351.
25.G.B. Zhang, J. Huang, and J. Liu, “A computational model for a biological inspired vision processor,” in Proceedings of Joint meeting of the 5th World Multi-conference on Systemics, Cybernetics and Informatics and the 7th International Conference on Information Systems Analysis and Synthesis, Orlando, vol. XV, Jul. 2001, pp.433-438.
26. G.B. Zhang, J. Liu, and H. Ogmen, “An analog VLSI visual-motion processor based on the fly visual system,” 19th Annual Houston Conference on Biomedical Engineering Research, Houston, Feb. 2001.
27.J. Liu and M. Brooke, “Fully parallel learning neural network chip for combustion instability control,” in Proceedings of IEEE International Joint Conference on Neural Networks, vol. 4, Jul. 1999, pp. 2323-2328.
28. J. Liu and M. Brooke, “Fully parallel on-chip learning neural network hardware for real-time control,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 5, Jun. 1999, pp. 371-374.
29. J. Liu, B. Burton, F. Kamran, M. Brooke, R. Harley, and T. Habetler, “High-speed on-line neural network control of an induction motor immune to analog circuit non-idealities,” in Proceedings of IEEE International Symposium on Circuits and Systems, vol. 1, Jun. 1997, pp. 633-636.
1. Improved filtering, equalization, and power estimation for enabling higher speed signal transmission; SRC Patent ID: P0407; Inventors: Xiaofeng Lin and Jin Liu; Filed Nov. 2003.
2. A multi-interval line coding technique for high-speed data transmissions; SRC Patent ID: P0477; Inventors: John Fonseka and Jin Liu, Filed Jan. 2005.
3. Time stamped architecture for visual motion sensor; Inventors: Guangbin Zhang and Jin Liu; Filed Jan. 2005.